The Catapult HLS application is designed to create SoC projects at the ANSI C++ and SystemC standard description level and then implement them at the RTL level.

Catapult HLS performs automatic RTL synthesis based on a high-level description, which significantly simplifies and speeds up the design process and allows to obtain correct RTL code, reducing the subsequent cost of its verification. Catapult HLS also has built-in formal expression control in C/C++ and SystemC, which allows to verify the source code before passing it to the synthesis stage.

A built-in power consumption optimisation mechanism significantly reduces power consumption in dynamic object mode. A highly interactive interface ensures full transparency and controllability of the synthesis process, allowing you to quickly produce RTL code optimised for performance, power consumption and chip area.

Key benefits and features

• Synthesis of SystemC and ANSI C++ source description
• Saves up to 80% "manual" writing of correct RTL code, which also reduces verification and debugging time
• Through fast modelling at system level (100-1000 times faster), functional verification time is reduced
• The RTL code on the Catapult HLS output is already optimised for performance, power consumption, chip area and time for further functional verification.

C/C++/SystemC synthesis

Based on a standard high-level C/C++/SystemC project description, it automatically synthesises optimised RTL code, significantly reducing design time and functional verification.

System-level verification

Catapult HLS implements the following verification procedures:

• Automatic formal validation of C/C++/SystemC expressions eliminates possible errors before the synthesis phase
• Comparison of system-level and RTL modelling results, including metrics for completeness of functional coverage and assertion modelling
• Formal equivalence checking of C/C++/SystemC source code and RTL code at synthesis output

Power optimisation

The only solution in the industry that enables power optimisation at system level. Using unique system level power analysis and optimisation technology, it provides the ability to select a low power option without compromising on performance or footprint.

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