Functional Verification

Questa inFact

Questa InFact is designed to generate portable test effects. It increases the level of verification abstraction and allows users to automatically generate different scenarios for unit, subsystem and SoC-level testing. Building on the renowned and proven technology of generating ad-hoc tests with constraints, Questa InFact provides additional efficiency, coverage and speed of verification through the use of portable test effects.

Questa InFact by Mentor A Siemens Business was the first successful commercial application to implement the ported test technology. The input to the app is a test specification that describes the purpose of the test, which is used to automatically generate test vectors and the required coverage for anything from individual blocks to the SoC as a whole. The generated tests can be used not only at any level of project hierarchy, but also on any verification platform, including modeling, hardware emulation, prototyping on FPGA, validation in silicon on off-the-shelf crystals in laboratory conditions. The tests are optimized for each individual project. Overall, Questa InFact offers the following capabilities:

-         Graph Theory-based technology to achieve complete functional coverage faster and detect as many errors as possible

-        Integrated environment for developing, editing and visualizing your portable test models

-An interactive environment for exploratory debugging (before modeling) of portable test models

-        Tools for importing constraints and variables for generating arbitrary tests from SystemVerilog classes

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